1. Field of the Invention
This invention relates to a method of forming a resistor, and in particular to a method to form an electrically isolated doped silicon-dioxide resistor.
2. Description of Prior Art
There are a variety of prior art methods used to form electrically isolated resistors in integrated circuits. One method of forming an isolated resistor is to form a resistive N region within a P region so as to electrically isolate the N region. Electrodes are then formed which contact the resistive N region. The doping concentration and geometry of the N region determines its resistance value. Another common method of forming a resistor is to form a layer of polycrystalline silicon (poly-Si) on a dielectric layer. The poly-Si layer is then doped to a specific level, patterned to form the resistor, and electrodes are formed to contact the resistor. Still another method of forming a resistor is to deposit a conductive material such as silicon-chrome or nickel-chrome on a dielectric layer, pattern the conductive material, and form electrodes to contact the resistor. No resistor has yet been formed within an integrated circuit which consists of a region of doped SiO.sub.2.
The ability of electrons to tunnel through a thin layer of SiO.sub.2 and effect a small current through the SiO.sub.2 is well known, particularly in the operation of electrically erasable programmable read only memories (EEPROM), where electron tunneling through a thin layer of pure SiO.sub.2 to charge and discharge a floating gate is by Fowler-Nordheim tunneling.
The article, "Electronic Conduction Mechanism of Cs- and B-Implanted SiO.sub.2 -Films", by W. Gartner, et al., Applied Physics 12, 137-148 (1977), discusses various tunneling mechanisms through an SiO.sub.2 film after implantation of Cs and B ions into the film. This article, herein incorporated by reference, describes how implantation of cesium (Cs) or boron (B) ions into an SiO.sub.2 film generally changes the conduction mechanism through the SiO.sub.2 from Fowler-Nordheim tunneling to Frenkel-Poole tunneling. The article also noted that a strong increase in the current through the SiO.sub.2 at high electric fields was observed after Cs-implantation, while B-implantation led to a decrease in the current at high electric fields. This effect is caused by field-enhanced emission and trapping of charged particles, respectively.
The article focuses on determining the current mechanism in thermally grown SiO.sub.2 films in MOS structures by using ion implantation to vary the current vs. voltage characteristics of the oxide. Current vs. voltage characteristics for the B and Cs ion implantations were plotted and analyzed in order to determine the conduction mechanism in the SiO.sub.2 film in response to low, medium and high electric fields. The structure under test is shown in FIG. 1, wherein a boron-doped silicon wafer with a resistivity of 2 to 3 .OMEGA..multidot.cm and a &lt;111&gt; crystal orientation has grown on it a layer of SiO.sub.2 approximately 600 .ANG. thick. An aluminum contact 0.5 mm in diameter and 1500 .ANG. thick was then evaporated on the SiO.sub.2 layer and another aluminum contact 1500 .ANG. thick was then formed on the bottom of the silicon wafer. Shown in FIG. 2 are the current density vs. electric field characteristics of the undoped SiO.sub.2. The current density vs. electric field characteristics for the 600 .ANG. thick layer of SiO.sub.2 doped with Cs is shown in FIG. 3 and the characteristics for a 600 .ANG. thick layer of SiO.sub.2 doped with B is shown in FIG. 4. The work of Gartner et al. shows that after implantation of the ions, at low electric fields, conduction is by space charged currents, and at medium electric fields, conduction is via the Frenkel-Poole mechanism. The curve shown in FIG. 3 is illustrative of the increase conductivity of SiO.sub.2 with implantation of Cs ions, and details of the particular experiment may be found in the reference.
Applying the concept of implanting ions into a thin layer of SiO.sub.2 for the purpose of forming a resistor in an integrated circuit would be relatively inexpensive compared to the three methods of forming resistors discussed above.